US Patent Issued to Intel on Sept. 9 for "Lateral confinement of source drain epitaxial growth in non-planar transistor for cell height scaling" (Oregon Inventors)

ALEXANDRIA, Va., Sept. 10 -- United States Patent no. 12,414,327, issued on Sept. 9, was assigned to Intel Corp. (Santa Clara, Calif.).

"Lateral confinement of source drain epitaxial growth in non-planar transistor for cell height scaling" was invented by Nitesh Kumar (Beaverton, Ore.), Mohammed Hasan (Aloha, Ore.), Vivek Thirtha (Portland, Ore.), Nikhil Mehta (Portland, Ore.) and Tahir Ghani (Portland, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Gate-all-around integrated circuit structures having nanoribbon sub-fin isolation by backside Si substrate removal etch selective to source and drain epitaxy, are described. For example, an integrated circuit structure includes a plurality of horizontal nano...