US Patent Issued to Intel on Sept. 16 for "Integrated circuit structures having backside gate tie-down" (Oregon Inventors)

ALEXANDRIA, Va., Sept. 17 -- United States Patent no. 12,419,085, issued on Sept. 16, was assigned to Intel Corp. (Santa Clara, Calif.).

"Integrated circuit structures having backside gate tie-down" was invented by Leonard P. Guler (Hillsboro, Ore.), Mauro J. Kobrinsky (Portland, Ore.), Mohit K. Haran (Hillsboro, Ore.), Marni Nabors (Portland, Ore.), Tahir Ghani (Portland, Ore.), Charles H. Wallace (Portland, Ore.), Allen B. Gardiner (Portland, Ore.) and Sukru Yemenicioglu (Portland, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Integrated circuit structures having backside gate tie-down are described. In an example, a structure includes a first vertical stack of horizontal nanowires over a first sub-f...