US Patent Issued to Intel on Oct. 7 for "Gate structures to enable lower subthreshold slope in gallium nitride-based transistors" (Oregon Inventors)

ALEXANDRIA, Va., Oct. 8 -- United States Patent no. 12,439,627, issued on Oct. 7, was assigned to Intel Corp. (Santa Clara, Calif.).

"Gate structures to enable lower subthreshold slope in gallium nitride-based transistors" was invented by Sanyam Bajaj (Hillsboro, Ore.), Michael S. Beumer (Portland, Ore.), Robert Ehlert (Portland, Ore.), Gregory P. McNerney (Beaverton, Ore.), Nicholas Minutillo (Beaverton, Ore.), Xiaoye Qin (Beaverton, Ore.), Johann C. Rode (Hillsboro, Ore.), Atsunori Tanaka (Hillsboro, Ore.), Suresh Vishwanath (Portland, Ore.) and Patrick M. Wallace (Hillsboro, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "In one embodiment, a transistor includes a substrate, a buffer layer on the subs...