US Patent Issued to Intel on Oct. 14 for "Method and apparatus for high-performance page-fault handling for multi-tenant scalable accelerators" (American, Indian Inventors)

ALEXANDRIA, Va., Oct. 21 -- United States Patent no. 12,443,477, issued on Oct. 14, was assigned to Intel Corp. (Santa Clara, Calif.).

"Method and apparatus for high-performance page-fault handling for multi-tenant scalable accelerators" was invented by Utkarsh Y. Kakaiya (Folsom, Calif.), Philip Lantz (Cornelius, Ore.), Sanjay Kumar (Hillsboro, Ore.), Rajesh Sankaran (Portland, Ore.), Narayan Ranganathan (Banglore, India), Saurabh Gayen (Portland, Ore.), Dhananjay Joshi (Portland, Ore.) and Nikhil P. Rao (Bengaluru, India).

According to the abstract* released by the U.S. Patent & Trademark Office: "Apparatus and method for high-performance page fault handling. For example, one embodiment of an apparatus comprises: one or more accelerator...