US Patent Issued to Intel on May 13 for "Non-planar integrated circuit structures having mitigated source or drain etch from replacement gate process" (Oregon Inventors)

ALEXANDRIA, Va., June 12 -- United States Patent no. 12,302,632, issued on May 13, was assigned to Intel Corp. (Santa Clara, Calif.).

"Non-planar integrated circuit structures having mitigated source or drain etch from replacement gate process" was invented by Jun Sung Kang (Portland, Ore.), Kai Loon Cheong (Beaverton, Ore.), Erica J. Thompson (Beaverton, Ore.), Biswajeet Guha (Hillsboro, Ore.), William Hsu (Hillsboro, Ore.), Dax M. Crum (Beaverton, Ore.), Tahir Ghani (Portland, Ore.) and Bruce Beattie (Portland, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Non-planar integrated circuit structures having mitigated source or drain etch from replacement gate process are described. For example, an integr...