US Patent Issued to Intel on June 17 for "Dynamic cache coherence protocol based on runtime interconnect utilization" (California, Illinois Inventors)

ALEXANDRIA, Va., June 19 -- United States Patent no. 12,332,796, issued on June 17, was assigned to Intel Corp. (Santa Clara, Calif.).

"Dynamic cache coherence protocol based on runtime interconnect utilization" was invented by Keqiang Wu (Palatine, Ill.), Lingxiang Xiang (San Jose, Calif.), Heidi Pan (Burlingame, Calif.), Christopher J. Hughes (Santa Clara, Calif.) and Zhe Wang (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "In one embodiment, a processor includes interconnect circuitry, processing circuitry, a first cache, and cache controller circuitry. The interconnect circuitry communicates over a processor interconnect with a second processor that includes a second cache. The processin...