US Patent Issued to Intel on July 22 for "Side-channel resistant multiplicatively masked encryption engine with zero-value attack detection" (Oregon Inventors)

ALEXANDRIA, Va., July 23 -- United States Patent no. 12,368,574, issued on July 22, was assigned to Intel Corp. (Santa Clara, Calif.).

"Side-channel resistant multiplicatively masked encryption engine with zero-value attack detection" was invented by Raghavan Kumar (Hillsboro, Ore.), Sanu Mathew (Portland, Ore.) and Sachin Taneja (Hillsboro, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "In one embodiment, a method comprises: combining, in a first adder circuit of a cryptographic engine, a round key with masked plaintext to generate an additively masked input; converting, in a first converter of the cryptographic engine, the additively masked input to a multiplicatively masked input; and performing, in ...