US Patent Issued to Intel on July 1 for "Enabling secure state-clean during configuration of partial reconfiguration bitstreams on FPGA" (American, German Inventors)

ALEXANDRIA, Va., July 3 -- United States Patent no. 12,346,489, issued on July 1, was assigned to Intel Corp. (Santa Clara, Calif.).

"Enabling secure state-clean during configuration of partial reconfiguration bitstreams on FPGA" was invented by Alpa Trivedi (Portland, Ore.), Scott Weber (Piedmont, Calif.), Steffen Schulz (Darmstadt, Germany) and Patrick Koeberl (Alsbach-Haenlein, Germany).

According to the abstract* released by the U.S. Patent & Trademark Office: "An apparatus to facilitate enabling secure state-clean during configuration of partial reconfiguration bitstreams on accelerator devices is disclosed. The apparatus includes a security engine to perform, as part of a PR configuration sequence for a new partial reconfiguration (...