US Patent Issued to Intel on Dec. 30 for "Native support for execution of get exponent, get mantisssa, and scale instructions within a graphics processing unit via reuse of fused multiply-add execution unit hardware logic" (California, Oregon Inventors)

ALEXANDRIA, Va., Dec. 31 -- United States Patent no. 12,511,121, issued on Dec. 30, was assigned to Intel Corp. (Santa Clara, Calif.).

"Native support for execution of get exponent, get mantisssa, and scale instructions within a graphics processing unit via reuse of fused multiply-add execution unit hardware logic" was invented by Shuai Mu (San Diego), Cristina S. Anderson (Hillsboro, Ore.) and Subramaniam Maiyuran (Gold River, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Embodiments are directed to systems and methods for reuse of FMA execution unit hardware logic to provide native support for execution of get exponent, get mantissa, and/or scale instructions within a GPU. These new instructions ma...