US Patent Issued to Intel on April 15 for "Application mapping on hardened network-on-chip (NoC) of field-programmable gate array (FPGA)" (California Inventor)

ALEXANDRIA, Va., June 5 -- United States Patent no. 12,277,060, issued on April 15, was assigned to Intel Corp. (Santa Clara, Calif.).

"Application mapping on hardened network-on-chip (NoC) of field-programmable gate array (FPGA)" was invented by Sailesh Kumar (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Methods and example implementations described herein are generally directed to the addition of networks-on-chip (NoC) to FPGAs to customize traffic and optimize performance. An aspect of the present application relates to a Field-Programmable Gate-Array (FPGA) system. The FPGA system can include an FPGA having one or more lookup tables (LUTs) and wires, and a Network-on-Chip (NoC) having ...