US Patent Issued to Intel NDTM US on Sept. 30 for "Method and apparatus to mitigate word line staircase etch stop layer thickness variations in 3D NAND devices" (Chinese, Singaporean Inventors)

ALEXANDRIA, Va., Sept. 30 -- United States Patent no. 12,432,922, issued on Sept. 30, was assigned to Intel NDTM US LLC (Santa Clara, Calif.).

"Method and apparatus to mitigate word line staircase etch stop layer thickness variations in 3D NAND devices" was invented by Hong Ma (Singapore), Sha Tao (Dalian, China) and Qun Li (Liaoning, China).

According to the abstract* released by the U.S. Patent & Trademark Office: "An apparatus, a method and a system. The apparatus comprises a memory array including word lines defining a staircase structure, and a staircase etch stop layer including: a sandwich etch stop layer disposed on a top region the staircase and including a first etch stop layer and a third etch stop layer of a first material, an...