US Patent Issued to Intel NDTM US on July 15 for "Method and apparatus to reduce memory in a NAND flash device to store page related information" (California Inventors)

ALEXANDRIA, Va., July 16 -- United States Patent no. 12,360,669, issued on July 15, was assigned to Intel NDTM US LLC (Santa Clara, Calif.).

"Method and apparatus to reduce memory in a NAND flash device to store page related information" was invented by Aliasgar S. Madraswala (Folsom, Calif.), Shanmathi Mookiah (Santa Clara, Calif.), Pratyush Chandrapati (Folsom, Calif.) and Naveen Prabhu Vittal Prabhu (Folsom, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "The size of page map memory in a NAND flash device used to store page related information is decreased by embedding page type in a row address. The row address is received by the NAND flash device from the host on the data bus in a six-cycle sequen...