US Patent Issued to GlobalFoundries U.S. on March 25 for "System and method employing power-optimized timing closure" (California Inventors)

ALEXANDRIA, Va., March 26 -- United States Patent no. 12,260,163, issued on March 25, was assigned to GlobalFoundries U.S. Inc. (Malta, N.Y.).

"System and method employing power-optimized timing closure" was invented by Navneet Jain (Milpitas, Calif.) and Mahbub Rashed (Cupertino, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Disclosed are embodiments of a computer-aided design system and corresponding method for power-optimized timing closure of an integrated circuit (IC) design. In the embodiments, a cell library includes sets of cells, where each cell in the same set has the same internal structure but different combinations of cell boundary isolation structures associated with different passive d...