ALEXANDRIA, Va., June 4 -- United States Patent no. 12,324,213, issued on June 3, was assigned to GLOBALFOUNDRIES U.S. Inc. (Malta, N.Y.).

"Stress layout optimization for device performance" was invented by Dirk Utess (Dresden, Germany), Zhixing Zhao (Dresden, Germany), Dominik M. Kleimaier (Dresden, Germany), Irfan A. Saadat (Santa Clara, Calif.) and Florent Ravaux (Wimille, France).

According to the abstract* released by the U.S. Patent & Trademark Office: "The present disclosure relates to semiconductor structures and, more particularly, to a layout optimization for radio frequency (RF) device performance and methods of manufacture. The structure includes: a first active device on a substrate; source and drain diffusion regions adjacen...