US Patent Issued to GlobalFoundries U.S. on June 10 for "Hierarchical memory architecture including on-chip multi-bank non-volatile memory with low leakage and low latency" (California, Texas, New York Inventors)

ALEXANDRIA, Va., June 18 -- United States Patent no. 12,328,880, issued on June 10, was assigned to GlobalFoundries U.S. Inc. (Malta, N.Y.).

"Hierarchical memory architecture including on-chip multi-bank non-volatile memory with low leakage and low latency" was invented by Navneet K. Jain (Milpitas, Calif.), Shashank S Nemawarkar (Austin, Texas) and Bipul C. Paul (Mechanicville, N.Y.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A disclosed non-volatile memory (NVM) structure is implemented in a fully depleted semiconductor-on-insulator technology processing platform and includes multiple NVM banks with NVM cells including transistors. NVM banks have well regions in a substrate. Transistors of NVM cells of ...