US Patent Issued to FUZHOU UNIVERSITY on Sept. 16 for "Multi-stage FPGA routing method for optimizing time division multiplexing" (Chinese Inventors)

ALEXANDRIA, Va., Sept. 17 -- United States Patent no. 12,417,335, issued on Sept. 16, was assigned to FUZHOU UNIVERSITY (Fujian, China).

"Multi-stage FPGA routing method for optimizing time division multiplexing" was invented by Wenzhong Guo (Fujian, China), Genggeng Liu (Fujian, China) and Guolong Chen (Fujian, China).

According to the abstract* released by the U.S. Patent & Trademark Office: "A multi-stage FPGA routing method for optimizing time division multiplexing comprises the following steps: S1: collecting an FPGA set, an FPGA connection pair set, a net set and a net group set; S2: acquiring a routing topology of each net according to the FPGA set, the FPGA connection pair set, the net set and the net group set under the condition...