ALEXANDRIA, Va., Aug. 12 -- United States Patent no. 12,387,029, issued on Aug. 12, was assigned to D2S INC. (San Jose, Calif.).
"Computing parasitic values for semiconductor designs" was invented by Akira Fujimura (Saratoga, Calif.), Nagesh Shirali (San Jose, Calif.) and Donald Oriordan (Sunnyvale, Calif.).
According to the abstract* released by the U.S. Patent & Trademark Office: "Some embodiments provide a method for calculating parasitic parameters for a pattern to be manufactured on an integrated circuit (IC) substrate. The method receives a definition of a wire structure as input. The method rasterizes the wire structure (e.g., produces pixel-based definition of the wire structure) to produce several images. Before rasterizing the w...