US Patent Issued to d-MATRIX on March 25 for "Generative AI accelerator apparatus using in-memory compute chiplet devices for transformer workloads" (California Inventors)

ALEXANDRIA, Va., March 26 -- United States Patent no. 12,260,223, issued on March 25, was assigned to d-MATRIX Corp. (Santa Clara, Calif.).

"Generative AI accelerator apparatus using in-memory compute chiplet devices for transformer workloads" was invented by Sudeep Bhoja (Cupertino, Calif.) and Siddharth Sheth (Cupertino, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "An AI accelerator apparatus using in-memory compute chiplet devices. The apparatus includes one or more chiplets, each of which includes a plurality of tiles. Each tile includes a plurality of slices, a central processing unit (CPU), and a hardware dispatch device. Each slice can include a digital in-memory compute (DIMC) device configu...