ALEXANDRIA, Va., March 26 -- United States Patent no. 12,261,139, issued on March 25, was assigned to Ciena Corp. (Hanover, Md.).
"Managing stress in semiconductor chips" was invented by Jean-Sebastien Cote (Quebec, Canada) and Vincent Belanger (Quebec, Canada).
According to the abstract* released by the U.S. Patent & Trademark Office: "A first chip comprises a first set of one or more metal layers having a first thickness and comprising at least one metal layer that has a first CTE. A first volume of the first chip is adjacent to the first set of one or more metal layers. A second volume of the first chip comprises one or more electronic or photonic structures, and a second set of one or more metal layers that has a second thickness at l...