US Patent Issued to Cadence Design Systems on Nov. 4 for "Method and apparatus for encoding of processor instruction set" (California Inventors)

ALEXANDRIA, Va., Nov. 6 -- United States Patent no. 12,461,748, issued on Nov. 4, was assigned to Cadence Design Systems Inc. (San Jose, Calif.).

"Method and apparatus for encoding of processor instruction set" was invented by Rong Chen (Fremont, Calif.), He Xiao (Campbell, Calif.), Nenad Nedeljkovi (Mountain View, Calif.), Dan Nicolaescu (Sacremento, Calif.), James Kim (San Jose, Calif.) and Jiayuan Chen (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "An approach of the present disclosure includes an algorithm to encode an instruction set of a domain-specific processor automatically in an optimal way, and which yields area-effective hardware. Instruction operands and opcodes can be encoded ...