US Patent Issued to Cadence Design Systems on Dec. 2 for "User interface for formal verification of computer instructions for compatibility with a compiler architecture" (American, Brazilian, Indian Inventors)

ALEXANDRIA, Va., Dec. 2 -- United States Patent no. 12,487,905, issued on Dec. 2, was assigned to Cadence Design Systems Inc. (San Jose, Calif.).

"User interface for formal verification of computer instructions for compatibility with a compiler architecture" was invented by Breno Rodrigues Guimaraes (Belo Horizonte, Brazil), Habeeb Farah (San Jose, Calif.), Andreas Tiemeyer (San Jose, Calif.) and Vaibhav Mittal (Whitefield, India).

According to the abstract* released by the U.S. Patent & Trademark Office: "Aspects are directed to formal verification of computer instructions. A system may present, at a user interface, a first model including one or more instructions, the first model corresponding to a data structure that corresponds to the...