ALEXANDRIA, Va., June 18 -- United States Patent no. 12,326,752, issued on June 10, was assigned to Avago Technologies International Sales Pte. Ltd. (Singapore).
"Synchronization of multiple clock dividers by using lower-frequency clocks and slipping cycles" was invented by Robert C. Schell (Chatham, N.J.).
According to the abstract* released by the U.S. Patent & Trademark Office: "Systems and methods for synchronizing multiple of output clocks. The system includes: a plurality of frequency dividers configured to receive a plurality of input clock signals and produce a plurality of output clock signals, wherein each of the plurality of output clock signals are lower in frequency than a corresponding input clock signal; and a circuit. The ...