US Patent Issued to Astera Labs on April 15 for "Low-latency retimer with seamless clock switchover" (California Inventors)

ALEXANDRIA, Va., June 5 -- United States Patent no. 12,277,002, issued on April 15, was assigned to Astera Labs Inc. (Santa Clara, Calif.).

"Low-latency retimer with seamless clock switchover" was invented by Jitendra Mohan (Santa Clara, Calif.), Subbarao Arumilli (Cupertino, Calif.), Charan Enugala (Newark, Calif.), Chi Feng (San Jose, Calif.), Ken (Keqin) Han (Fremont, Calif.), Pulkit Khandelwal (Cupertino, Calif.), Vikas Khandelwal (San Jose, Calif.), Casey Morrison (San Jose, Calif.), Enrique Musoll (San Jose, Calif.) and Vivek Trivedi (Fremont, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "A low-latency signaling link retimer generates an output signal transmission synchronously with respect to ...