US Patent Issued to ASM IP Holding on May 6 for "Formation of gate stacks comprising a threshold voltage tuning layer" (Arizona Inventors)

ALEXANDRIA, Va., June 10 -- United States Patent no. 12,295,163, issued on May 6, was assigned to ASM IP Holding B.V. (Almere, Netherlands).

"Formation of gate stacks comprising a threshold voltage tuning layer" was invented by Fu Tang (Gilbert, Ariz.), Eric James Shero (Phoenix), Gejian Zhao (Tempe, Ariz.) and Eric Jen Cheng Liu (Tempe, Ariz.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Threshold voltage (Vt) tuning layers may be sensitive to etching by reactants used to deposit overlying gate material, such as metal nitride. Methods for depositing Vt tuning layers are provided. In some embodiments Vt tuning layers may comprise a Vt tuning material in a neutral matrix. In some embodiments, processes for r...