US Patent Issued to Applied Materials on Nov. 18 for "Low resistivity gapfill for logic devices" (California Inventors)

ALEXANDRIA, Va., Nov. 18 -- United States Patent no. 12,473,643, issued on Nov. 18, was assigned to Applied Materials Inc. (Santa Clara, Calif.).

"Low resistivity gapfill for logic devices" was invented by Zhen Liu (Santa Clara, Calif.), Min-Han Lee (San Jose, Calif.), Jie Zhang (Sunnyvale, Calif.), Yongqian Gao (Sunnyvale, Calif.), Tsung-Han Yang (San Jose, Calif.) and Rongjun Wang (Dublin, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Embodiments of the disclosure relate to methods for metal gapfill of a logic device with lower resistivity. Specific embodiments provide integrated separate tungsten PVD processes with plasma-etch to solve the overhang issue caused by tungsten PVD and the high resisti...