ALEXANDRIA, Va., Feb. 19 -- United States Patent no. 12,231,132, issued on Feb. 18, was assigned to Apple Inc. (Cupertino, Calif.).
"Systems and methods for PLL duty cycle calibration" was invented by Karim M Megawer (San Diego), Jongmin Park (San Diego) and Thomas Mayer (Linz, Austria).
According to the abstract* released by the U.S. Patent & Trademark Office: "To enhance phase-locked loop (PLL) performance, PLL duty-cycle calibration may be desirable. In some cases, higher reference clock frequency may assist in reducing phase noise and increasing power efficiency of the PLL. A frequency doubler may increase the PLL reference clock frequency, but the duty cycle error in the clock may result in a spur at a clock frequency offset. Low pha...