US Patent Issued to ANRITSU on July 1 for "Clock recovery circuit, error rate measurement apparatus, and error rate measurement method" (Japanese Inventor)

ALEXANDRIA, Va., July 3 -- United States Patent no. 12,346,151, issued on July 1, was assigned to ANRITSU Corp. (Kanagawa, Japan).

"Clock recovery circuit, error rate measurement apparatus, and error rate measurement method" was invented by Kazuhiro Yamane (Kanagawa, Japan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A clock recovery circuit includes a reference clock generation unit that generates a reference clock subjected to SSC modulation, a clock recovery unit that recovers an SSC modulated clock of a data signal subjected to the SSC modulation in synchronization with the reference clock, and a modulation signal generation unit that generates a modulation signal based on cycle information indicating ...