US Patent Issued to Altera on Sept. 30 for "Controlled transition between configuration mode and user mode to reduce current-resistance voltage drop" (American, Indian Inventors)

ALEXANDRIA, Va., Sept. 30 -- United States Patent no. 12,429,900, issued on Sept. 30, was assigned to Altera Corp. (San Jose, Calif.).

"Controlled transition between configuration mode and user mode to reduce current-resistance voltage drop" was invented by Atul Maheshwari (Portland, Ore.), Ankireddy Nalamalpu (Portland, Ore.), Mahesh A. Iyer (Fremont, Calif.) and Mahesh K. Kumashikar (Bangalore, India).

According to the abstract* released by the U.S. Patent & Trademark Office: "Systems or methods of the present disclosure may provide for gradually adjusting a frequency of a clock signal. When transitioning from a configuration mode to a user mode, a clock of an integrated circuit (e.g., a field-programmable gate array or FPGA) may quickl...