US Patent Issued to Altera on Dec. 9 for "Incremental just-in-time (JIT) performance refinement for programmable logic device offload" (Canadian, American Inventors)

ALEXANDRIA, Va., Dec. 9 -- United States Patent no. 12,493,454, issued on Dec. 9, was assigned to Altera Corp. (San Jose, Calif.).

"Incremental just-in-time (JIT) performance refinement for programmable logic device offload" was invented by Michael Kinsner (Halifax, Canada), John Freeman (Waterloo, Canada), Ben J. Ashbaugh (Folsom, Calif.) and Rajesh Poornachandran (Portland, Ore.).

According to the abstract* released by the U.S. Patent & Trademark Office: "An apparatus to facilitate incremental just-in-time (JIT) performance refinement for programmable logic device offload is disclosed. The apparatus includes a processor to: initiate multiple just-in-time (JIT) compilation iterations of an application; program a first architecture of a f...