ALEXANDRIA, Va., Nov. 6 -- United States Patent no. 12,461,681, issued on Nov. 4, was assigned to Advanced Micro Devices Inc (Santa Clara, Calif.) and ATI Technologies ULC (Markham, Canada).
"Fine-grained clocking and clock distribution in low power double data rate physical layer interface" was invented by Pouya Najafi Ashtiani (Toronto), Anwar Parvez Kashem (Sudbury, Mass.), Kapil Acharya (Bangalore, India) and Mahanth Kumar Gurram (Bengaluru, India).
According to the abstract* released by the U.S. Patent & Trademark Office: "A system includes a memory device and a memory controller operatively connected to the memory device via a physical layer interface (PHY). The PHY includes an active first-in-first-out (FIFO) buffer configured to r...