US Patent Issued to Adeia Semiconductor Technologies on Aug. 5 for "Through-dielectric-vias (TDVs) for 3D integrated circuits in silicon" (California Inventor)

ALEXANDRIA, Va., Aug. 6 -- United States Patent no. 12,381,117, issued on Aug. 5, was assigned to Adeia Semiconductor Technologies LLC (San Jose, Calif.).

"Through-dielectric-vias (TDVs) for 3D integrated circuits in silicon" was invented by Cyprian Emeka Uzoh (San Jose, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Through-dielectric-vias (TDVs) for 3D integrated circuits in silicon are provided. Example structures and processes fabricate conductive vertical pillars for an integrated circuit assembly in a volume of dielectric material instead of in silicon. For example, a block of a silicon substrate may be removed and replaced with dielectric material, and then a plurality of the conductive pillars...