US Patent Issued to Adeia Semiconductor Bonding Technologies on July 29 for "Multi-chip modules formed using wafer-level processing of a reconstituted wafer" (California Inventors)

ALEXANDRIA, Va., July 30 -- United States Patent no. 12,374,656, issued on July 29, was assigned to Adeia Semiconductor Bonding Technologies Inc. (San Jose, Calif.).

"Multi-chip modules formed using wafer-level processing of a reconstituted wafer" was invented by Liang Wang (Newark, Calif.) and Rajesh Katkar (Milpitas, Calif.).

According to the abstract* released by the U.S. Patent & Trademark Office: "Apparatuses and methods are described. This apparatus includes a bridge die having first contacts on a die surface being in a molding layer of a reconstituted wafer. The reconstituted wafer has a wafer surface including a layer surface of the molding layer and the die surface. A redistribution layer on the wafer surface includes electricall...