ALEXANDRIA, Va., June 19 -- United States Patent no. 12,332,683, issued on June 17, was assigned to Achronix Semiconductor Corp. (Santa Clara, Calif.).
"Synchronous reset deassertion circuit" was invented by Namit Varma (Karnataka, India), Sarma Jonnavithula (Bangalore, India), Mohan Krishna Vedam (Karantaka, India), Christopher C. LaFrieda (Ridgefield, N.J.) and Virantha N. Ekanayake (Baltimore).
According to the abstract* released by the U.S. Patent & Trademark Office: "Distribution of a reset signal across a system-on-chip (SoC) may be the highest latency signal in the circuit. As a result, the operating frequency of the device is reduced to ensure that the reset signal reaches all intellectual property (IP) blocks during a single cloc...