US Patent Issued to ABLIC on Sept. 9 for "Layout design support apparatus, layout design support method, and manufacturing method of semiconductor device" (Japanese Inventor)

ALEXANDRIA, Va., Sept. 10 -- United States Patent no. 12,412,021, issued on Sept. 9, was assigned to ABLIC Inc. (Nagano, Japan).

"Layout design support apparatus, layout design support method, and manufacturing method of semiconductor device" was invented by Tadashi Kiyuna (Kanagawa, Japan).

According to the abstract* released by the U.S. Patent & Trademark Office: "A layout design support apparatus 100 determines, in a circuit element connected to a first external terminal P1 to which a first potential identification label is added, whether to short-circuit one terminal connected to the first external terminal P1 and another terminal based on a determination criterion according to element type information and breakdown voltage informatio...