ALEXANDRIA, Va., June 10 -- United States Patent no. 12,292,836, issued on May 6.
"Cache synchronization for chiplet accelerators" was invented by Preyesh Dalmia (Madison, Wis.), Rajesh Shashi Kumar (Madison, Wis.) and Matthew D. Sinclair (Middleton, Wis.).
According to the abstract* released by the U.S. Patent & Trademark Office: "A chiplet-based architecture provides for a reduction in cache synchronization operations by tracking a relationship between chiplet execution kernels and array operands to elide synchronization when particular arrays are not in use in the caches of other chiplets or when the current target chiplet already has the array operand. Further efficiency is promoted in some embodiments by assigning chiplets for reuse ...