US Patent Issued on Jan. 28 for "Gate bias circuit for a driver monolithically integrated with a GAN power FET" (Indian, American Inventors)

ALEXANDRIA, Va., Jan. 29 -- United States Patent no. 12,212,310, issued on Jan. 28.

"Gate bias circuit for a driver monolithically integrated with a GAN power FET" was invented by Manish Shah (Vernon Hills, Ill.), Rajesh Ghosh (Hooghly, India), Syed Asif Eqbal (Patna, India), Firdos Khan (Raniganj, India) and Subhendu Rana (Purba Medinipur, India).

According to the abstract* released by the U.S. Patent & Trademark Office: "An electronic device includes a GaN power FET, a GaN driver coupled to the GaN power FET and a gate bias circuit coupled to the GaN driver. The GaN power FET and the GaN driver are monolithically integrated on a single GaN die. The gate bias circuit is predominately monolithically integrated on the single GaN die and in...