ALEXANDRIA, Va., Feb. 11 -- United States Patent no. 12,547,552, issued on Feb. 10.
"Low cost and low latency logical unit erase" was invented by Stephen Hanna (Fort Collins, Colo.).
According to the abstract* released by the U.S. Patent & Trademark Office: "A memory control unit of a memory device includes at least one hardware processor; and memory storing instructions that cause the at least one hardware processor to perform operations comprising: generating a scrambler seed and a logical block address (LBA) for a block of write data received by the memory control unit from a host device; generating a flash translation layer (FTL) to map the LBA to a physical address (PA); scrambling the block of data using the scrambler seed; encrypti...