INTERNATIONAL PATENT: WEEBIT NANO LTD. FILES APPLICATION FOR "METHODS OF MANUFACTURE TO MITIGATE SURFACE MOUNT TECHNOLOGY (SMT) IMPACT ON BIT ERROR RATE (BER) OF RESISTIVE RANDOM ACCESS MEMORY (RERAM) CELLS BY ADAPTATION OF RESISTANCE THRESHOLD"

GENEVA, July 2 -- WEEBIT NANO LTD. (24 Hanagar Street4527713 Hod Hasharon) filed a patent application (PCT/IB2023/000770) for "METHODS OF MANUFACTURE TO MITIGATE SURFACE MOUNT TECHNOLOGY (SMT) IMPACT ON BIT ERROR RATE (BER) OF RESISTIVE RANDOM ACCESS MEMORY (RERAM) CELLS BY ADAPTATION OF RESISTANCE THRESHOLD" on Dec 22, 2023. With publication no. WO/2025/133670, the details related to the patent application was published on Jun 26, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): PICCOLBONI, Giuseppe (c/o Weebit Nano Ltd.24 Hanagar Street4527713 Hod Hasharon), MOLAS, Gabriel (c/o Weebit Nano ...