INTERNATIONAL PATENT: TRACER VALIDATION INC. FILES APPLICATION FOR "METHOD FOR ENSURING THE INTEGRITY OF SEMICONDUCTOR DEVICES FROM WAFER FABRICATION THROUGH PACKAGING"

GENEVA, April 21 -- TRACER VALIDATION INC. (2520 N. Rulon White Blvd.Ogden, UT 84404) filed a patent application (PCT/US2024/050928) for "METHOD FOR ENSURING THE INTEGRITY OF SEMICONDUCTOR DEVICES FROM WAFER FABRICATION THROUGH PACKAGING" on Oct 11, 2024. With publication no. WO/2025/080950, the details related to the patent application was published on Apr 17, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): BELLIS, Matt (252 Clay Avenue,Lexington, KY 40502), WOODBURY, C., Davis (4024 S. 2225 W.Roy, UT 84404)

Abstract: Secure marks for semiconductor devices and methods for marking semicon...