GENEVA, Feb. 3 -- SOITEC (PARC TECHNOLOGIQUE DES FONTAINESCHEMIN DES FRANQUES38190 BERNIN) filed a patent application (PCT/EP2024/066092) for "GATE ALL AROUND SEMICONDUCTOR STRUCTURE AND ITS METHOD OF PREPARATION" on Jun 11, 2024. With publication no. WO/2025/021364, the details related to the patent application was published on Jan 30, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): NGUYEN, Bich-Yen (co/SOITECPARC TECHNOLOGIQUE DES FONTAINESCHEMIN DES FRANQUES38190 BERNIN), RODA NEVE, Cesar (co/SOITECPARC TECHNOLOGIQUE DES FONTAINESCHEMIN DES FRANQUES38190 BERNIN), BESNARD, Guillaume (co/SO...