INTERNATIONAL PATENT: SILICON STORAGE TECHNOLOGY, INC. FILES APPLICATION FOR "OUTPUT BLOCK FOR VECTOR-BY-MATRIX MULTIPLICATION ARRAY"

GENEVA, Aug. 5 -- SILICON STORAGE TECHNOLOGY, INC. (450 HOLGER WAYSAN JOSE, California 95134) filed a patent application (PCT/US2024/024091) for "OUTPUT BLOCK FOR VECTOR-BY-MATRIX MULTIPLICATION ARRAY" on Apr 11, 2024. With publication no. WO/2025/159778, the details related to the patent application was published on Jul 31, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): TRAN, Hieu Van (2642 Gayley PlaceSan Jose, California 95135)

Abstract: In one example, a system comprises: a vector-by-matrix multiplication array comprising non-volatile memory cells arranged into rows and columns; and ...