GENEVA, Feb. 4 -- SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC (5701 N. Pima RoadScottsdale, Arizona 85250) filed a patent application (PCT/US2023/075684) for "PLANAR JFET DEVICE WITH REDUCED GATE RESISTANCE" on Oct 02, 2023. With publication no. WO/2025/023985, the details related to the patent application was published on Jan 30, 2025.
Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).
Inventor(s): BOLOTNIKOV, Alexander Viktorovich (503 Vly Pointe Dr.Niskayuna, New York 12309)
Abstract:
A junction field effect transistor (JFET) (100) includes a drift region (110) disposed on a substrate (111) that includes a dra...