GENEVA, Jan. 25 -- RENESAS ELECTRONICS AMERICA INC. (1001 Murphy Ranch Road, MilpitasCalifornia 95035), ZENG, Xiangyin (c/o Renesas Integrated Circuit (Shanghai) Co., Ltd. Suite 1202 12th Floor, Tower 165 Guiqing Road,Xuhui District, Shanghai 200233) filed a patent application (PCT/CN2024/105721) for "CONTINUOUS TIME LINEAR EQUALIZER OPTIMIZATION IN MEMORY DEVICES" on Jul 16, 2024. With publication no. WO/2026/016041, the details related to the patent application was published on Jan 22, 2026.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): HU, Zhigang (c/o Renesas Integrated Circuit (Shanghai) Co...