INTERNATIONAL PATENT: QUALCOMM INCORPORATED FILES APPLICATION FOR "TIMING ERROR GROUP, TEG, ASSISTANCE DATA, REPORTING AND CAPABILITY FRAMEWORK FOR JOINT DOWNLINK AND SIDELINK POSITIONING"

GENEVA, March 18 -- QUALCOMM INCORPORATED (ATTN: International IP Administration5775 Morehouse DriveSan Diego, California 92121-1714) filed a patent application (PCT/US2024/037237) for "TIMING ERROR GROUP, TEG, ASSISTANCE DATA, REPORTING, AND CAPABILITY FRAMEWORK FOR JOINT DOWNLINK AND SIDELINK POSITIONING" on Jul 09, 2024. With publication no. WO/2025/053902, the details related to the patent application was published on Mar 13, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): MANOLAKOS, Alexandros (QUALCOMM Incorporated5775 Morehouse DriveSan Diego, California 92121-1714), KUMAR, Mukesh (QU...