GENEVA, Sept. 21 -- NANUSENS SL (Av. del Parc Tecnologic, 3 CENT, Parc Tecnològic del Valles08290 Cerdanyola del Valles) filed a patent application (PCT/EP2025/056768) for "SYSTEMS AND METHODS FOR ESD PROTECTION OF SEMICONDUCTOR DEVICES" on Mar 12, 2025. With publication no. WO/2025/191015, the details related to the patent application was published on Sep 18, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): MONTANYA I SILVESTRE, Josep (17 Leighon RoadPaignton TQ3 2BQ)

Abstract: An electrostatically-protected integrated circuit (IC) includes a pad configured to provide an electrical c...