GENEVA, Nov. 25 -- MICRON TECHNOLOGY, INC. (8000 South Federal WayBoise, Idaho 83716) filed a patent application (PCT/US2025/026847) for "THROUGH-SILICON VIA PITCH TRANSLATION FOR STACKED MEMORY DEVICES" on Apr 29, 2025. With publication no. WO/2025/240117, the details related to the patent application was published on Nov 20, 2025.
Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).
Inventor(s): AYYAPUREDDI, Sujeet (c/o Micron Technology, Inc.8000 South Federal WayBoise, Idaho 83716-9632)
Abstract: Apparatuses, systems, and methods for translating the through-silicon via (TSV) pitch. A stacked memory device may ...