INTERNATIONAL PATENT: MICRON TECHNOLOGY, INC. FILES APPLICATION FOR "STACKED HYBRID MEMORY ARCHICTECTURE"

GENEVA, Oct. 14 -- MICRON TECHNOLOGY, INC. (Mail Stop 5078000 South Federal WayP.O. Box 6Boise, Idaho 83707-0006) filed a patent application (PCT/US2025/014433) for "STACKED HYBRID MEMORY ARCHICTECTURE" on Feb 04, 2025. With publication no. WO/2025/212162, the details related to the patent application was published on Oct 09, 2025.

Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).

Inventor(s): ZHANG, Wenlun (1-22-1-201, Fuda, Chofu-shiTokyo, 1820024), HE, Yuan (6187 S. Teak AveBoise, Idaho 83716)

Abstract: A stacked hybrid memory architecture includes a dynamic random-access memory (DRAM) device. The DRAM devic...