GENEVA, Oct. 6 -- MICRON TECHNOLOGY, INC. (8000 South Federal Way, Post Office Box 6Boise, Idaho 83707-0006) filed a patent application (PCT/US2025/020876) for "SEMICONDUCTOR PACKAGE HAVING AN ARRAY OF MULTI-SIZED INTERCONNECT STRUCTURES" on Mar 21, 2025. With publication no. WO/2025/207433, the details related to the patent application was published on Oct 02, 2025.
Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).
Inventor(s): WANG, Chao Wen (8000 South Federal Way, Post Office Box 6Boise, Idaho 83707-0006)
Abstract: Implementations described herein relate to various semiconductor device assemblies. In some i...