GENEVA, Nov. 11 -- MICRON TECHNOLOGY, INC. (8000 S. Federal Way, P.O. Box 6Boise, ID 83707-0006) filed a patent application (PCT/US2025/025253) for "SEMICONDUCTOR DEVICES WITH NANO-VIAS, SUCH AS NANO-THROUGH-SILICON VIAS LANDING ON MIDDLE-OF-LINE OR BACK-END-OF-LINE LAYERS" on Apr 17, 2025. With publication no. WO/2025/230742, the details related to the patent application was published on Nov 06, 2025.
Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).
Inventor(s): BHUSHAN, Bharat (c/o Micron Technology, Inc.8000 S. Federal Way, P.O. Box 6Boise, ID 83707-0006), McDANIEL, Terrence, B. (c/o Micron Technology, Inc.8...