GENEVA, March 18 -- MICRON TECHNOLOGY, INC. (8000 S. Federal Way, P.O. Box 6Boise, ID 83707-0006) filed a patent application (PCT/US2024/042120) for "SEMICONDUCTOR DEVICE WITH LAYERED DIELECTRIC" on Aug 13, 2024. With publication no. WO/2025/053966, the details related to the patent application was published on Mar 13, 2025.
Notably, the patent application was submitted under the International Patent Classification (IPC) system, which is managed by the World Intellectual Property Organization (WIPO).
Inventor(s): ZHOU, Wei (c/o Micron Technology, Inc.8000 S. Federal Way, P.O. Box 6Boise, ID 83707-0006), BHUSHAN, Bharat (c/o Micron Technology, Inc.8000 S. Federal Way, P.O. Box 6Boise, ID 83707-0006), PAREKH, Kunal, R. (c/o Micron Technolog...